instruction mnemonic การใช้

• Instruction mnemonics use " destination, source " operand order.
• :Intel used to claim it owned the instruction mnemonics for x86 microprocessors.
• In use, a programmer would write several instruction mnemonics alongside one another, and the assembler would combine them with OR to devise the actual instruction word.
• As software is routinely Intel's x86 assembly language  because of the support for various sizes ( and backward compatibility ) in the instruction set, some instruction mnemonics carry " d " or " q " identifiers denoting " double-", " quad-" or " double-quad-", which are in terms of the architecture's original 16-bit word size.
• The mnemonic letter M, for " memory " ( referenced by HL ), was lifted out from within the instruction mnemonic to become a syntactically freestanding " operand ", while registers and combinations of registers became very inconsistently denoted; either by abbreviated operands ( MVI D, LXI H and so on ), within the instruction mnemonic itself ( LDA, LHLD and so on ), or both at the same time ( LDAX B, STAX D and so on ).
• The mnemonic letter M, for " memory " ( referenced by HL ), was lifted out from within the instruction mnemonic to become a syntactically freestanding " operand ", while registers and combinations of registers became very inconsistently denoted; either by abbreviated operands ( MVI D, LXI H and so on ), within the instruction mnemonic itself ( LDA, LHLD and so on ), or both at the same time ( LDAX B, STAX D and so on ).